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Don't you need a fair bit of capital to develop ASICs?

Not sure if you mean external or internal memory, I'll assume external. It matters how you implement it. If it's full combinatorial, you wouldn't need much memory at all (if any) apart from the controller chip. The main thing is that you would need a lot of logic elements per algo to do this...

I think you probably could fit it on that board, full parallel. Your only limitation would be propagation errors. Let us know what you get for the quote, I've got a feeling it's gonna be $8000. Thanks for the link! I get it know, you would run the same amount of hashes+DDR interfacing, that it...

How many cycles does it take to reprogram an FPGA? I haven't got the padding going but the hash it's correct for a 1024-bit message. I'm going to try and get groestl going so I can at least mine something in the mean time. EDIT: I forgot! It's my code in verilog. How about you?

that's perfect, thanks! I think you're right glamorgoblin, my full parallel Blake512 implementation took up a majority of my cyclone IV. I don't quite understand your idea, would the micros be there just to reprogram the FPGA between each algo?

I haven't looked enough into Skien however Blake just ups all words to 64-bit from 32-bit for 512 and 256 respectively

Does anyone know what the counters t0 and t1 are in the blake algo? https://131002.net/blake/blake.pdf, Glamorgoblin, have you got any of the algos working? maybe we can work on different algos and combine?

Fusecavator thankyou so much. Everything I needed. This means an FPGA could run 11 hashes at the same time, limited by the largest nonce required by the one of the 11 algos. Awesome! Lets start with just getting 1 hash at a time going

Are you able to break it down for me a little more. do you need to hash all the 11 algos until you solve each? if so, do you submit 11 nonces'?

Nice workflow summary, I will happily include myself in such a funds/beer/weed pooling!

I'd be very interested in getting involved. I've already dabbled a bit on my DE2-115 board, trying to port the bitcoin FPGA code (https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner) however I can't get my head around the X11 Algorithm. Like you, I have a low level background, my only C...