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Any update on the GroestlCoin FPGA miner, cause it looks like a good starting point of X11. However, it should be noted that GroestlCoin will switch to PoS after 150000 in a month. I am still working to upgrade the following Groestl Verilog code to 512 bit...

We could do this with 0.11 um or even 0.18 um technology, and finish the design firstly. The MPW fee could be affordable with a small amount IPO and pre-order for full-mask in the future. However, the risk is still high, because the Darkcoin team may change the mining algorithm anytime.

How about design an ASIC for darkcoin at the same time, any experienced ASIC designer interested here?

Here is the hash variants you want: blake512->bmw512->groestl512->skein512->jh512->keccak512->luffa512->cubehash512->shavite512->simd512->echo512 By the way, your FPGA guys should start to prepare the 64 bit word hash code, cause many of the open source code is only 32 bit.

One more thing is the unrolled pipeline, and this is used to accelerate the speed at the cost of resource, right? We have the resource problem because we want to implement 11 algorithms in one chip, therefore optimization is required or just get a better FPGA.

I just added the required slice for each algorithm and the sum is slightly larger than the total slice number of spartan 6 used in the popular miners. However, considering normally only 80% slice could be used, it could be even worse, therefore I am wondering to combine two spartan on Icarus...

I am interested in this, and I have done a little math about the slice number. It seems that single spartan 6 is not enough for X11 according to results report at https://www.rcis.aist.go.jp/special/SASEBO/SHA3-en.html.